Renaissance Semiconductor Ltd (RENSEMI) is a technology-focused engineering company working on the design, implementation, and validation of advanced electronic and semiconductor-based systems. The company specialises in system-level design, hardware development, and practical engineering solutions that bridge the gap between concept, implementation, and real-world operation.

RENSEMI’s work spans analogue, digital, and mixed-signal domains, with a strong emphasis on robust system architecture, hands-on validation, and high-quality technical delivery. The company operates with a small, highly skilled engineering team and focuses on delivering technically sound, well-tested solutions for complex engineering challenges.

Location: UK (Remote)
Team: Digital Design Team
Employment Type: Full-time

Role Overview

Renaissance Semiconductor Ltd (RENSEMI) is seeking a Digital Hardware Design Engineer to drive the implementation, optimisation, verification, and deployment of AI/ML and DSP algorithms on FPGA platforms, with a clear pathway toward ASIC readiness. This role is deeply hands-on and spans algorithm modelling, fixed-point design, RTL development, FPGA bring-up, performance/power optimisation, and system integration.

The engineer will act as a key contributor bridging algorithm development and hardware realisation, ensuring models translate into accurate, efficient, real-time FPGA implementations. You will collaborate closely with algorithm, verification, software, and system teams to deliver robust, testable designs that meet throughput, latency, and resource constraints.

Key Responsibilities

Algorithm-to-Hardware Implementation

  • Translate AI/ML and DSP algorithms into efficient FPGA hardware architectures (streaming pipelines, systolic arrays, MAC engines, FIR/IIR, FFT, feature extraction).
  • Develop RTL (SystemVerilog/VHDL) for algorithm accelerators and supporting datapaths (buffers, schedulers, control FSMs).
  • Define and implement fixed-point arithmetic strategies (Q-format selection, scaling, saturation/rounding, overflow management).
  • Collaborate on algorithm refinements to ensure hardware feasibility and optimal performance.

Fixed-Point Modelling and Golden Reference

  • Build and maintain bit-accurate Python/MATLAB models aligned with RTL behaviour.
  • Generate test vectors and reference outputs for regression and equivalence checking.
  • Validate numerical performance (SNR, quantisation error, stability, detection accuracy) against requirements.

FPGA Verification and Validation

  • Create robust simulation environments (UVM-lite or directed TBs), including constrained stimulus, monitors, and scoreboards.
  • Develop automated regression flows and debugging workflows using waveforms, assertions, and coverage metrics.
  • Perform post-synthesis/post-place-and-route validation (timing closure awareness, CDC checks, constraint sanity).
  • Support hardware validation on FPGA boards using ILA/VIO, logic analysers, and lab instrumentation as needed.

System Integration and Interfaces

  • Integrate accelerators into FPGA SoC environments (AXI/AHB/APB-style register interfaces, streaming interfaces, DMA integration).
  • Implement configuration/control registers, interrupt signalling, and performance counters.
  • Support hardware/software co-design: drivers, register maps, firmware hooks, and test applications.

Performance, Resource, and Power Optimisation

  • Optimise designs for throughput, latency, LUT/FF/BRAM/DSP utilisation, and clock frequency targets.
  • Apply architectural techniques such as pipelining, parallelism, time-multiplexing, quantisation-aware design, and memory bandwidth optimisation.
  • Profile and tune designs to meet real-time constraints and system-level throughput.

Documentation and Collaboration

  • Document architecture decisions, scaling strategy, block diagrams, test methodology, and verification results.
  • Participate in design reviews, contribute to coding guidelines, and support team knowledge sharing.
  • Work closely with system, verification, and embedded software engineers to ensure alignment and delivery quality.

Required Skills and Experience

Education

BSc, MSc, or PhD in Electronic Engineering, Electrical Engineering, Digital or Mixed-Signal Electronics, Digital Signal Processing, or equivalent practical industry experience.

Essential

  • Minimum BSc and 10+ years of experience
  • Strong RTL design experience in SystemVerilog/VHDL for FPGA-based digital systems.
  • Practical experience implementing DSP and/or AI/ML workloads in hardware (filters, transforms, feature extraction, CNN/ML kernels, matrix ops).
  • Solid understanding of fixed-point arithmetic, quantisation effects, and numerical robustness in hardware.
  • Solid understanding of processor architectures (RISC-V) and system-on-chip (SoC) design principles, including processing cores, memory hierarchies, interconnects, and peripheral integration.
  • Experience with FPGA toolchains (e.g., Vivado/Quartus), synthesis, timing constraints, and debugging flows.
  • Competence in verification: testbench development, self-checking tests, assertions, and regression automation.
  • Ability to reason about micro-architecture trade-offs (latency vs throughput, BRAM vs DSP, precision vs accuracy).
  • Good documentation and communication skills, able to explain complex design choices clearly.

Desirable

  • Experience creating FPGA- or ASIC-based test environments or validation frameworks.
  • Experience developing engineering GUIs or test tools (e.g. Python, Qt, MATLAB, or similar).
  • Exposure to fixed-point and floating-point DSP or AI/ML algorithm implementation on FPGA and/or ASIC platforms.
  • Knowledge of streaming architectures, dataflow design, and memory bandwidth optimisation.
  • Experience integrating accelerators into RISC-V/ARM SoC environments and working with bus protocols (AXI/AHB/APB).

Application

Please send your CV to careers@rensemi.com.

What We Offer

  • A technically challenging, hands-on role with exposure to the full system lifecycle, from early bring-up to validated hardware.
  • Opportunity to work on advanced electronic and semiconductor-focused systems, spanning analogue, digital, FPGA/ASIC, and embedded software domains.
  • A collaborative engineering environment where practical problem-solving and system-level understanding are valued.
  • High degree of technical ownership and responsibility, with direct impact on real hardware and delivered systems.
  • Flexible working arrangements and a competitive salary aligned with experience and responsibility.

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